AI First EDA
Hardware at the speed of software.
Describe the board you need. A model designs it, the tools check every step, and you review the drawing instead of making it. Parts sourced, board routed, fab files written, in an afternoon. And because the design lives in code, your firmware starts with every pin and rail already known.
you
modelwriting src/main.rs: an ESP32, a red LED on GPIO2 through 330 Ω, a header for power and flashing
$etch check
ok: 8 parts, 9 nets, 0 errors, 1 warning
modelW0012 EN floats at power-up; adding a 10 kΩ pull-up and 100 nF
$etch check
ok: 10 parts, 10 nets, 0 errors, 0 warnings
$etch schematic
wrote schematic.svg
youlooks right. board?
$etch resolve && etch pcb
ok: board 27.5 × 31.5 mm, 41 tracks, 12 vias, 0 unrouted
$etch fab
wrote fab/blinky-gerbers.zip, blinky-bom.csv, blinky-cpl.csv
How it works
One program, one loop. The model writes, the tools answer, you review.
A schematic is one circuit! block: rails, parts with their
constraints, nets as lists of pins. Everything else is a command over that file.
- describeOne sentence, or a datasheet's worth.
- check
etch checkruns the compiler, then the validator. Every error names a line and a fix. - drawThe schematic, redrawn whenever the program compiles.
- source
etch resolvebinds each part to something orderable and locks it. - route
etch pcbplaces, routes and checks the rules. - fab
etch fabwrites Gerbers, drills, BOM and placement.
Why it is fast
- The tools push back. The compiler rejects a pin the part does not have. The validator names every problem with a code and a line. The router says what it could not connect. A model fixes what it is told and checks again.
- Every step is a command. A model can run all of them and read every answer. So can you, from the terminal or the page.
- You review, you do not draw. The drawing is a view of the program, redrawn on every change. Look at it, say what to change, and the loop goes round again.
- Nothing is hidden. Plain text in git, a lock file for the parts, and a diff that shows exactly what changed.
Design
The schematic is a program, so the compiler is its first reviewer.
- A closed vocabulary. What
circuit!cannot say cannot be written. A model gets a grammar and a compiler, not a language to wander in. - Typed units. A resistor takes
330 ohm. There is no way to hand it100 nF. - Parts are types. A board can only name a part with a pin table and a footprint. A pin the part does not have is a compile error with a line number.
- Every problem has a code. The compiler stops at the token that is wrong:
an unknown pin, an output on a rail, a role a pin cannot take. The validator
reports the rest, a net with one pin among them, each with a code and a line,
and
etch explainsays what to do. - Parts come later. The program names what the circuit needs: a 330 Ω
0603 resistor, a red LED.
etch resolvebinds each to something orderable and records it inetch.lock, like a package manager. - Firmware reads the same file. A role on an MCU pin,
gpio_out @ 1 Hz, is firmware intent.etch exporthands every pin, net and role to whatever writes the firmware, so the board module comes from the schematic, not from memory.
circuit! {
name "blinky";
rails {
V3V3: power 3.3 V;
GND: ground;
}
parts {
u1: Esp32Wroom32; // U1
r_led: resistor 330 ohm, 0603; // R1
r_en: resistor 10 kohm, 0603; // R2, EN pull-up
d1: led red, 0603; // D1
j1: PinHeader1x6; // J1, power and flashing
c_en: capacitor 100 nF, 0603; // C1, EN delay
}
nets {
V3V3: u1.VDD3P3, j1.1, r_en.2;
GND: u1.GND, j1.2, c_en.2, d1.K;
EN: u1.EN, r_en.1, c_en.1, j1.3;
LED_DRV: u1.GPIO2 as gpio_out @ 1 Hz, r_led.1;
LED_K: r_led.2, d1.A;
}
}
etch schematic, as drawn from the program aboveVision
The goal
Make the trip from an idea to a board you can order short enough to take twice.
Boards are slow to iterate on. Drawing takes an evening, sourcing takes another, layout takes a weekend, and every change means doing part of it again. Most of that is not thinking; it is pushing wires around and remembering which part was out of stock. If that part of the work can be handed off, the second and third versions of a board cost an afternoon, not a month, and a design gets to be wrong a few times before it is right.
The hypothesis
LLMs got good at code quickly. Hardware is slower. If hardware is code, the gap closes.
Models reason well about programs because programs push back: a compiler, a test, a type. Schematics in a drawing tool do not push back at all. Written as a Rust program, a circuit gets the same loop a program has, with the compiler as the first reviewer and the validator and the router as the next two. Rust in particular, because it catches the most at compile time, and because the board's pins can be the same values the firmware uses, with Embassy, so the hardware and the software are one description.
That is the bet this project makes. It is early, opinionated and one person's.
What comes out
The point is a board in your hands, not a picture of one. etch fab
writes what the quote page wants:
- blinky-gerbers.zip
- nine Gerbers and the drill files, KiCad's names
- blinky-bom.csv
- the bill of materials in JLCPCB's layout
- blinky-cpl.csv
- pick-and-place positions and rotations
- etch.lock
- which real part each generic one became, and why
Fabrication itself is not this project's job. Getting you to the upload button with everything it asks for is.
etch pcb: 27.5 × 31.5 mm, two layers, routed